Random Access Memories (RAMs) are a very important components of complex electronic circuits. Two main types of RAM are in use today: static RAMs, in which data that is written is retained for a long period of time and dynamic RAMs, which are denser, but which do not retain data for long periods of time and, therefore, need to be periodically refreshed.
Data is written to and read from a RAM cell via ports. Single port RAMs have only one port, therefore, only one read or write operation can occur in a single port RAM cell at any given time. In many cases it is desirable to be able to read and write simultaneously (or with different clock speeds), so dual port RAMs are used. A typical use for dual port RAMs is for buffering between a fast CPU and a slow device. The CPU reads and writes to the RAM at one (fast or synchronous) speed and the device reads and writes to the RAM at another (slow or asynchronous) speed. There also exist N-port RAM designs where some ports are for reading or writing only and some are both for reading and for writing.
Gate arrays are integrated circuits that are designed to be customized. Typically, the lower (usually 8) layers of a gate array are standardized and define an array of transistors (or gates). The upper (usually 6) layers of a gate array are interconnection layers which define the interconnections between the transistors (gates). Since only the interconnection layers need to be customized to customize the gate array, gate arrays are typically used when a circuit is fabricated in numbers too low to justify the expense of designing a new integrated circuit. Since most electronic systems today contain a substantial amount of RAM, a system designer who uses gate arrays usually includes several RAM integrated circuits in his design. In cases where a special kind of RAM is desired or if separate RAM integrated circuits cannot be used, there are several solutions.
A first and least efficient solution is to use the gates of the gate array itself to create on-chip RAM. This solution is wasteful since the gates in the gate array are typically large, while memory cells are typically small.
A second solution is to provide un-configurable memory on the gate-array. The main drawback of this solution is that it is hard to know in advance the exact type and size of memory that will be needed for the customized device.
A third solution is to provide two small transistors with each gate so that by using the appropriate customization each gate can be converted to a memory cell. Since the added transistors are small, they do not add very much to the size of each cell.
ROMs are particularly useful when it is sought to repeatedly access fixed data. ROMs are normally more dense than RAMs. U.S. Pat. No. 5,311,464 describes a semiconductor memory cell forming a ROM cell from a RAM cell. Circuitry is provided to ensure that data written into the RAM cell before an electrical power supply is cut off is retained, providing a ROM type functionality.